The department represents the technological basis for all patterning processes of the Center for Microtechnologies and its partners. In a class 4 (ISO 14644-1) cleanroom a complete process line is available - starting from mask fabrication and lithography processes up to a large variety of wet and dry etching steps. 4" and 6" wafers can be processed throughout including 5" and 7" mask fabrication. Partially, process tools are available even for 200 mm wafers. The optical lithography is based on a mask aligner (up to 200 mm wafers) and an i-line wafer stepper (up to 6" wafers). Beside the conventional lithography processes, the department is experienced with double-side exposure, spray coating on 3D surfaces and the treatment of special resist types like SU8 by using advanced systems. Furthermore cavities can be filled individually by a special spray robot. With respect to nanopatterning, a 20 years experience exists within the e-beam lithography field. In combination with about 10 dry etch tools, sub quarter micron structures have been etched into numerous materials. Using resist patterns made by partners and special hard masks, feature sizes smaller than 100 nm have been transferred.
Beside these technology services for internal and external partners - the department is performing R&D-projects focusing on dry etching processes and High-Aspect-Ratio-MEMS (HAR-MEMS). This work is addressing applications in microsystems technologies, microelectronics, spintronics and photovoltaics as well. Therefore etching of new materials and surface modification steps are investigated. Based on the developed and patented AIM-Technology (Airgap Insulation of Microstructures) a sensor and actuator fabrication platform is available. Using this technology high performance low-g and vibration sensors are provided to several partners for system integration. For this, much effort has been spent additionally in device characterization at wafer level and yield improvement. Another example of successful technology research is the development of a new thin film encapsulation procedure in order to reduce the package size and costs of the devices.